The memory data access rates required of memory devices is increasing as complex computer applications utilize increasingly powerful processors.
In some cases, applications such as games and user interfaces (UIs) can produce more sustained bandwidth from the system processor and integrated graphics and memory controller (GMCH) chipset, than can be supported by a system memory device over the range of ambient environmental temperatures.
Thermal constraints of modern memory devices play a prominent role in limiting the maximum data access rates that memory device interfaces can currently support.
For Example, memory devices (such as Rambus, Single and Double Data-Rate SDR, DDR, DDR2) may have limited thermal capabilities given their packages and design implementation practicalities, yet the actual memory interface on these devices can support increasingly higher data rates. Even with improvements in device geometry, the maximum thermal power that can be produced by these memory devices can exceed the package capabilities, in sustained throughput scenarios.
The thermal constraints of memory devices are an especially important issue in mobile PC designs where ambient temperatures are not presumed fixed and a volume air-flow over memory devices may not be reliable.
Current solutions addressing thermal constraints in memory devices attempt to infer the memory thermal power which correlates to the casing temperature on the memory device. Throttling (e.g. applying a memory access rate limits), and how-much throttling to apply to control the temperature of the memory may be based upon inferential methods.
For example, “bandwidth counters” apply a bandwidth limit (e.g. by inserting low-energy wait-states into certain types of access cycles) when access burst patterns exceed a defined limit over a period of time. Other solutions include the “virtual temperature sensor” (VTS) which involves inferring the temperature of a memory device through a correlation between memory device power and memory device temperature. In this method, device power is a summation of energy per memory access, and the device current specification.
The uncertainty inherent in bandwidth counters and VTS as thermal management methods for memory devices leads to poor data access rate performance. There is merely a loose correlation between bandwidth and memory device temperature. These solutions can require significant amounts of “guardbanding” (e.g. accounting for error, and inaccuracy) in order to accommodate worst-case conditions when locating a target temperature threshold, and applying memory access rate limits. Unfortunately, this “guardbanding” may cut into normal operating performance, and unnecessarily impact benchmark results.